Dissertation Announcement for Prasanna Piya
02/20/17 at 10:00 AM

February 6, 2017

Dear Faculty, Graduate and Undergraduate students,

You are cordially invited to my Ph.D. dissertation defense.

Dissertation Title: Grid fault ride-through capability of voltage-controlled inverters for distributed generation applications.
When: Monday, February 20, 2017, 10:00 AM
Where: Simrall 228
Candidate: Prasanna Piya
Degree: Ph.D., Electrical and Computer Engineering

Committee:

Dr. Masoud Karimi-Ghartemani
Associate Professor of Electrical and Computer Engineering (Major Professor)

Dr. Yong Fu
Associate Professor of Electrical and Computer Engineering (Committee Member)

Dr. Sherif Abdelwahed
Associate Professor of Electrical and Computer Engineering (Committee Member)

Dr. Heejin Cho
Assistant Professor of Mechanical Engineering (Committee Member)

Abstract

The increased integration of distributed and renewable energy resources (DERs) has motivated the evolution of new standards in grid interconnection requirements. New standards have the requirement for the DERs to remain connected during the transient grid fault conditions and to offer support to the grid. This requirement is known as the fault ride-through (FRT) capability of the inverter-based DERs and is an increasingly important issue.

This dissertation presents the FRT capability of the DERs that employ a voltage control strategy in their control systems. The voltage control strategy is increasingly replacing the current control strategy in the DERs due to the fact that it provides direct voltage support. However, the voltage control technique limits the ability of direct control over the inverter current. This presents a challenge in addressing the FRT capability where the problem is originally formulated in terms of the current control.

This dissertation develops a solution for the FRT capability of inverters that use a voltage control strategy. The proposed controller enables the inverter to ride through the grid faults and support the grid by injecting a balanced current with completely controlled real and reactive power components. The proposed controller is flexible and can be used in connection with various voltage control strategies. Stability analysis of the proposed control structure is performed based on a new linear time-invariant model developed in this dissertation. This model significantly facilitates the stability and design of such control loops.

Detailed simulation, real-time, and experimental results are presented to evaluate the performance of the proposed control strategy in various operating conditions. Desirable transient and steady responses of the proposed controller are observed. Furthermore, the newly established German and Danish grid fault ride-through standards are implemented in this research as two application examples and the effectiveness of the dissertation results are illustrated in the context of those two examples.

Best Regards,

Prasanna Piya